1 |
Working mechanism of iodide ions and its application to Cu microstructure control in through silicon via filling Sung M, Kim SH, Lee HJ, Lim T, Kim JJ Electrochimica Acta, 295, 224, 2019 |
2 |
Activation of amino-based monolayers for electroless metallization of high-aspect-ratio through-silicon vias by using a simple ultrasonic-assisted plating solution Chen ST, Cheng YS, Chang YH, Yang TM, Lee JT, Chen GS Applied Surface Science, 440, 209, 2018 |
3 |
구리 전해 도금을 이용한 실리콘 관통 비아 채움 공정 김회철, 김재정 Korean Chemical Engineering Research, 54(6), 723, 2016 |
4 |
Galvanostatic bottom-up filling of TSV-like trenches: Choline-based leveler containing two quaternary ammoniums Kim MJ, Seo Y, Kim HC, Lee Y, Choe S, Kim YG, Cho SK, Kim JJ Electrochimica Acta, 163, 174, 2015 |
5 |
Properties and electric characterizations of tetraethyl orthosilicate-based plasma enhanced chemical vapor deposition oxide film deposited at 400 degrees C for through silicon via application Su MY, Yu DQ, Liu YJ, Wan LX, Song CS, Dai FW, Xue K, Jing XM, Guidotti D Thin Solid Films, 550, 259, 2014 |
6 |
Filling performance and electrical characteristics of Al2O3 films deposited by atomic layer deposition for through-silicon via applications Choi KK, Kee J, Kim SH, Park MS, Park CG, Kim DK Thin Solid Films, 556, 560, 2014 |
7 |
Enhancement of flexural stress and reduction of surface roughness through changes in gas concentrations during high-speed chemical dry thinning of silicon wafers Kim IJ, Lee NE Thin Solid Films, 547, 173, 2013 |
8 |
Effect of Non-conductive Film on the Reliability of Multi-chip Package Bonded Using Ultrasonic Energy Lee JB, Lee JG, Ha SS, Jung SB Journal of Adhesion Science and Technology, 25(18), 2475, 2011 |
9 |
3차원 집적회로 반도체 칩 기술에 대한 경향과 전망 권용재 Korean Chemical Engineering Research, 47(1), 1, 2009 |