검색결과 : 3건
| No. | Article |
|---|---|
| 1 |
Monolithic 3D CMOS Using Layered Semiconductors Sachid AB, Tosun M, Desai SB, Hsu CY, Lien DH, Madhvapathy SR, Chen YZ, Hettick M, Kang JS, Zeng YP, He JH, Chang EY, Chueh YL, Javey A, Hu CM Advanced Materials, 28(13), 2547, 2016 |
| 2 |
MoS2 transistors with 1-nanometer gate lengths Desai SB, Madhvapathy SR, Sachid AB, Llinas JP, Wang QX, Ahn GH, Pitner G, Kim MJ, Bokor J, Hu CM, Wong HSP, Javey A Science, 354(6308), 99, 2016 |
| 3 |
Drain current model for nanoscale double-gate MOSFETs Hariharan V, Thakker R, Singh K, Sachid AB, Patil MB, Vasi J, Rao VR Solid-State Electronics, 53(9), 1001, 2009 |