검색결과 : 23건
No. | Article |
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1 |
TFET inverter static and transient performances in presence of traps and localized strain Gnani E, Visciarelli M, Gnudi A, Reggiani S, Baccarani G Solid-State Electronics, 159, 38, 2019 |
2 |
Design guidelines for GaSb/InAs TFET exploiting strain and device size Visciarelli M, Gnani E, Gnudi A, Reggiani S, Baccarani G Solid-State Electronics, 129, 157, 2017 |
3 |
TCAD analysis of the leakage current and breakdown versus temperature of GaN-on-Silicon vertical structures Cornigli D, Monti F, Reggiani S, Gnani E, Gnudi A, Baccarani G Solid-State Electronics, 115, 173, 2016 |
4 |
Theoretical analysis and modeling for nanoelectronics Baccarani G, Gnani E, Gnudi A, Reggiani S Solid-State Electronics, 125, 2, 2016 |
5 |
Capacitance estimation for In As Tunnel FETs by means of full-quantum k . p simulation Gnani E, Baravelli E, Gnudi A, Reggiani S, Baccarani G Solid-State Electronics, 108, 104, 2015 |
6 |
A quasi 2D semianalytical model for the potential profile in hetero and homojunction tunnel FETs Villani F, Gnani E, Gnudi A, Reggiani S, Baccarani G Solid-State Electronics, 113, 86, 2015 |
7 |
Graphene base heterojunction transistor: An explorative study on device potential, optimization, and base parasitics Di Lecce V, Grassi R, Gnudi A, Gnani E, Reggiani S, Baccarani G Solid-State Electronics, 114, 23, 2015 |
8 |
Investigation on the electrical properties of superlattice FETs using a non-parabolic band model Maiorano P, Gnani E, Grassi R, Gnudi A, Reggiani S, Baccarani G Solid-State Electronics, 98, 45, 2014 |
9 |
Boosting the voltage gain of graphene FETs through a differential amplifier scheme with positive feedback Grassi R, Gnudi A, Di Lecce V, Gnani E, Reggiani S, Baccarani G Solid-State Electronics, 100, 54, 2014 |
10 |
Design and optimization of impurity- and electrostatically-doped superlattice FETs to meet all the ITRS power targets at V-DD=0.4 V Maiorano P, Gnani E, Gnudi A, Reggiani S, Baccarani G Solid-State Electronics, 101, 70, 2014 |