검색결과 : 7건
| No. | Article |
|---|---|
| 1 |
VDNROM: A novel four-physical-bits/cell vertical channel dual-nitride-trapping-layers ROM for high density flash memory applications Zhou F, Cai Y, Huang R, Li Y, Shan X, Liu J, Guo A, Zhang X, Wang Y Solid-State Electronics, 51(11-12), 1547, 2007 |
| 2 |
Effect of fabrication process on the charge trapping behavior of SiON thin films Wang SY, Lue HT, Lai EK, Yang LW, Gong J, Chen KC, Hsieh KY, Ku J, Lu CY Solid-State Electronics, 50(7-8), 1171, 2006 |
| 3 |
NVM based on FinFET device structures Hofmann F, Specht M, Dorda U, Kommling R, Dreeskornfeld L, Kretz J, Stadele M, Rosner W, Risch L Solid-State Electronics, 49(11), 1799, 2005 |
| 4 |
Spatial characterization of localized charge trapping and charge redistribution in the NROM device Shappir A, Levy D, Shacham-Diamand Y, Lusky E, Bloom I, Eitan B Solid-State Electronics, 48(9), 1489, 2004 |
| 5 |
Characterizing damage to ONO dielectrics induced during programming SONOS/NROM (TM) non-volatile semiconductor memory (NVSM) devices Wrazien SJ, Wang Y, Khan BM, White MH Solid-State Electronics, 48(10-11), 2035, 2004 |
| 6 |
Subthreshold slope degradation model for localized-charge-trapping based non-volatile memory devices Shappir A, Shacham-Diamand Y, Lucky E, Bloom I, Eitan B Solid-State Electronics, 47(5), 937, 2003 |
| 7 |
NROM (TM) - a new technology for non-volatile memory products Bloom I, Pavan P, Eitan B Solid-State Electronics, 46(11), 1757, 2002 |