| 1 |
Investigation of the temperature dependence of random telegraph noise fluctuations in nanoscale polysilicon-channel 3-D Flash cells
Nicosia G, Goda A, Spinelli AS, Compagnoni CM
Solid-State Electronics, 151, 18, 2019 |
| 2 |
Leakage characterization of top select transistor for program disturbance optimization in 3D NAND flash
Zhang Y, Jin L, Jiang DD, Zou XQ, Zhao ZG, Gao J, Zeng M, Zhou WB, Tang ZY, Huo ZL
Solid-State Electronics, 141, 18, 2018 |
| 3 |
Program scheme using common source lines in channel stacked NAND flash memory with layer selection by multilevel operation
Kim DB, Kwon DW, Kim S, Lee SH, Park BG
Solid-State Electronics, 140, 46, 2018 |
| 4 |
System-level read disturb suppression techniques of TLC NAND flash memories for Read-Hot/Cold data mixed applications
Watanabe H, Deguchi Y, Kobayashi A, Matsui C, Takeuchi K
Solid-State Electronics, 147, 63, 2018 |
| 5 |
Improvement of cell reliability by floating gate implantation on 1Xnm NAND flash memory
Liao JH, Ko ZJ, Lin YM, Lin HJ, Hsieh JY, Yang LW, Yang T, Chen KC, Lu CY
Solid-State Electronics, 146, 39, 2018 |
| 6 |
Effect of thermal annealing sequence on the crystal phase of HfO2 and charge trap property of Al2O3/HfO2/SiO2 stacks
Na H, Jeong J, Lee J, Shin H, Lee S, Sohn H
Current Applied Physics, 17(10), 1361, 2017 |
| 7 |
Simultaneous Roll Transfer and Interconnection of Flexible Silicon NAND Flash Memory
Kim DH, Yoo HG, Hong SM, Jang B, Park DY, Joe DJ, Kim JH, Lee KJ
Advanced Materials, 28(38), 8371, 2016 |
| 8 |
Study of of high-tech process furnace using inherently safer design strategies (IV). Advanced NAND device design and thin film process adjustment
Lu CC, Chang KC, Chen CY
Journal of Loss Prevention in The Process Industries, 40, 378, 2016 |
| 9 |
A 72% error reduction scheme based on temperature acceleration for long-term data storage applications: Cold flash and millennium memories
Yamazaki S, Iwasaki TO, Hachiya S, Takahashi T, Takeuchi K
Solid-State Electronics, 121, 25, 2016 |
| 10 |
Word line program disturbance based data retention error recovery strategy for MLC NAND Flash
Ma HZ, Pan LY, Song CL, Gao ZY, Wu D, Xu J
Solid-State Electronics, 109, 1, 2015 |
