검색결과 : 6건
No. | Article |
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1 |
Impact of a 10 nm ultra-thin BOX (UTBOX) and ground plane on FDSOI devices for 32 nm node and below Fenouillet-Beranger C, Perreau P, Denorme S, Tosti L, Andrieu F, Weber O, Monfray S, Barnola S, Arvet C, Campidelli Y, Haendler S, Beneyton R, Perrot C, de Buttet C, Gros P, Pham-Nguyen L, Leverd F, Gouraud P, Abbate F, Baron F, Torres A, Laviron C, Pinzelli L, Vetier J, Borowiak C, Margain A, Delprat D, Boedt F, Bourdelle K, Nguyen BY, Faynot O, Skotnicki T Solid-State Electronics, 54(9), 849, 2010 |
2 |
Gate-all-around technology: Taking advantage of ballistic transport? Huguenin JL, Bidal G, Denorme S, Fleury D, Loubet N, Pouydebasque A, Perreau P, Leverd F, Barnola S, Beneyton R, Orlando B, Gouraud P, Salvetat T, Clement L, Monfray S, Ghibaudo G, Boeuf F, Skotnicki T Solid-State Electronics, 54(9), 883, 2010 |
3 |
FDSOI devices with thin BOX and ground plane integration for 32 nm node and below Fenouillet-Beranger C, Denorme S, Perreau P, Buj C, Faynot O, Andrieu F, Tosti L, Barnola S, Salvetat T, Garros X, Casse M, Allain F, Loubet N, Pham-Nguyen L, Deloffre E, Gros-Jean M, Beneyton R, Laviron C, Marin M, Leyris C, Haendler S, Leverd F, Gouraud P, Scheiblin P, Clement L, Pantel R, Deleonibus S, Skotnicki T Solid-State Electronics, 53(7), 730, 2009 |
4 |
Folded fully depleted FET using Silicon-On-Nothing technology as a highly W-scaled planar solution Bidal G, Loubet N, Fenouillet-Beranger C, Denorme S, Perreau P, Fleury D, Clement L, Laviron C, Leverd F, Gouraud P, Barnola S, Beneyton R, Torres A, Duluard C, Chapon JD, Orlando B, Salvetat T, Grosjean M, Deloffre E, Pantel R, Dutartre D, Monfray S, Ghibaudo G, Boeuf F, Skotnicki T Solid-State Electronics, 53(7), 735, 2009 |
5 |
A new CMP-less integration approach for highly scaled totally silicided (TOSI) gate bulk transistors based on the use of selective S/D Si epitaxy and ultra-low gates Muller M, Mondot A, Aime D, Froment B, Talbot A, Roux JM, Ribes G, Morand Y, Descombes S, Gouraud P, Leverd F, Pokrant S, Toffoli A, Skotnicki T Solid-State Electronics, 50(4), 620, 2006 |
6 |
Emerging silicon-on-nothing (SON) devices technology Monfray S, Skotnicki T, Fenouillet-Beranger C, Carriere N, Chanemougame D, Morand Y, Descombes S, Talbot A, Dutartre D, Jenny C, Mazoyer P, Palla R, Leverd F, Le Friec Y, Pantel R, Borel S, Louis D, Buffet N Solid-State Electronics, 48(6), 887, 2004 |