검색결과 : 8건
No. | Article |
---|---|
1 |
Variable temperature characterization of low-dimensional effects in tri-gate SOI MOSFETs Barrett C, Lederer D, Redmond G, Xiong W, Colinge JP, Quinn AJ Solid-State Electronics, 54(11), 1273, 2010 |
2 |
Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs Lee CW, Lederer D, Afzalian A, Yan R, Dehdashti N, Xiong W, Colinge JP Solid-State Electronics, 52(11), 1815, 2008 |
3 |
SELECTED PAPERS FROM THE EUROSOI'08 CONFERENCE Foreword Lederer D, Colinge JP Solid-State Electronics, 52(12), 1839, 2008 |
4 |
Sensitivity of trigate MOSFETs to random dopant induced threshold voltage fluctuations Yan R, Lynch D, Cayron T, Lederer D, Afzalian A, Lee CW, Dehdashti N, Colinge JP Solid-State Electronics, 52(12), 1872, 2008 |
5 |
Behaviour of TFMS and CPW line on SOI substrate versus high temperature for RF applications Moussa MS, Pavageau C, Lederer D, Picheta L, Danneville F, Fel N, Russat J, Raskin JP, Vanhoenacker-Janvier D Solid-State Electronics, 50(11-12), 1822, 2006 |
6 |
Effective resistivity of fully-processed SOI substrates Lederer D, Raskin JP Solid-State Electronics, 49(3), 491, 2005 |
7 |
FinFET analogue characterization from DC to 110 GHz Lederer D, Kilchytska V, Rudenko T, Collaert N, Flandre D, Dixit A, De Meyer K, Raskin JP Solid-State Electronics, 49(9), 1488, 2005 |
8 |
Substrate loss mechanisms for microstrip and CPW transmission lines on lossy silicon wafers Lederer D, Raskin JP Solid-State Electronics, 47(11), 1927, 2003 |