검색결과 : 4건
| No. | Article |
|---|---|
| 1 |
Digital and analog TFET circuits: Design and benchmark Strangio S, Settino F, Palestri P, Lanuzza M, Crupi F, Esseni D, Selmi L Solid-State Electronics, 146, 50, 2018 |
| 2 |
Understanding the impact of point-contact scheme and selective emitter in a c-Si BC-BJ solar cell by full 3D numerical simulations Guerra N, De Rose R, Guevara M, Procel P, Lanuzza M, Crupi F Solar Energy, 155, 1443, 2017 |
| 3 |
Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits Strangio S, Palestri P, Lanuzza M, Esseni D, Crupi F, Selmi L Solid-State Electronics, 128, 37, 2017 |
| 4 |
Low voltage logic circuits exploiting gate level dynamic body biasing in 28 nm UTBB FD-SOI Taco R, Levi I, Lanuzza M, Fish A Solid-State Electronics, 117, 185, 2016 |