검색결과 : 4건
No. | Article |
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1 |
Characterization and modeling of 28-nm FDSOI CMOS technology down to cryogenic temperatures Beckers A, Jazaeri F, Bohuslayskyi H, Hutin L, De Franceschi S, Enz C Solid-State Electronics, 159, 106, 2019 |
2 |
Trans-capacitance modeling in junctionless gate-all-around nanowire FETs Jazaeri F, Barbut L, Sallese JM Solid-State Electronics, 96, 34, 2014 |
3 |
On performance scaling and speed of junctionless transistors Koukab A, Jazaeri F, Sallese JM Solid-State Electronics, 79, 18, 2013 |
4 |
Analytical model for ultra-thin body junctionless symmetric double gate MOSFETs in subthreshold regime Jazaeri F, Barbut L, Koukab A, Sallese JM Solid-State Electronics, 82, 103, 2013 |