검색결과 : 95건
No. | Article |
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1 |
Gate-induced drain leakage (GIDL) in MFMIS and MFIS negative capacitance FinFETs Min J, Choe G, Shin C Current Applied Physics, 20(11), 1222, 2020 |
2 |
Theoretical study of the laser annealing process in FinFET structures Lombardo SF, Fisicaro G, Deretzis I, La Magna A, Curver B, Lespinasse B, Huet K Applied Surface Science, 467, 666, 2019 |
3 |
Power reduction for recovery of a FinFET by electrothermal annealing Han JK, Park JY, Choi YK Solid-State Electronics, 151, 6, 2019 |
4 |
Comparison of work function variation between FinFET and 3D stacked nanowire FET devices for 6-T SRAM reliability Ko K, Son D, Kang M, Shin H Solid-State Electronics, 140, 74, 2018 |
5 |
Kinetic Monte Carlo study on the evolution of silicon surface roughness under hydrogen thermal treatment Wang G, Wang Y, Wang JZ, Pan LJ, Yu LW, Zheng YD, Shi Y Applied Surface Science, 414, 361, 2017 |
6 |
DC and RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration Deshpande V, Djara V, O'Connor E, Hashemi P, Balakrishnan K, Caimi D, Sousa M, Czornomaz L, Fompeyrine J Solid-State Electronics, 128, 87, 2017 |
7 |
Low frequency noise assessment in n- and p-channel sub-10 nm triple-gate FinFETs: Part I: Theory and methodology Boudier D, Cretu B, Simoen E, Carin R, Veloso A, Collaert N, Thean A Solid-State Electronics, 128, 102, 2017 |
8 |
Low frequency noise assessment in n- and p-channel sub-10 nm triple-gate FinFETs: Part II: Measurements and results Boudier D, Cretu B, Simoen E, Carin R, Veloso A, Collaert N, Thean A Solid-State Electronics, 128, 109, 2017 |
9 |
Two methods of tuning threshold voltage of bulk FinFETs with replacement high-k metal-gate stacks Xu M, Zhu HL, Zhang YB, Xu QX, Zhang YK, Qin CL, Zhang QZ, Yin HX, Xu H, Chen S, Luo J, Li CL, Zhao C, Ye TC Solid-State Electronics, 129, 52, 2017 |
10 |
Underlapped FinFET on insulator: Quasi3D analytical model Kumari V, Sharmetha K, Saxena M, Gupta M Solid-State Electronics, 129, 138, 2017 |