검색결과 : 12건
No. | Article |
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1 |
This special issue is devoted to selected papers presented at the EuroSOI-ULIS2018 international conference, held in Granada, Spain on 19-21 March 2018 Preface Gamiz F, Donetti L, Sampedro C Solid-State Electronics, 159, 1, 2019 |
2 |
A thorough study of Si nanowire FETs with 3D Multi-Subband Ensemble Monte Carlo simulations Donetti L, Sampedro C, Ruiz FG, Godoy A, Gamiz F Solid-State Electronics, 159, 19, 2019 |
3 |
Multi-Subband Ensemble Monte Carlo simulations of scaled GAA MOSFETs Donetti L, Sampedro C, Ruiz FG, Godoy A, Gamiz F Solid-State Electronics, 143, 49, 2018 |
4 |
Confinement orientation effects in S/D tunneling Medina-Bailon C, Sampedro C, Gamiz F, Godoy A, Donetti L Solid-State Electronics, 128, 48, 2017 |
5 |
Impact of non uniform strain configuration on transport properties for FD14+devices Medina-Bailon C, Sampedro C, Gamiz F, Godoy A, Donetti L Solid-State Electronics, 115, 232, 2016 |
6 |
Inversion charge modeling in n-type and p-type Double-Gate MOSFETs including quantum effects: The role of crystallographic orientation Balaguer M, Roldan JB, Donetti L, Gamiz F Solid-State Electronics, 67(1), 30, 2012 |
7 |
Reaching sub-32 nm nodes: ET-FDSOI and BOX optimization Sampedro C, Gamiz F, Donetti L, Godoy A Solid-State Electronics, 70, 101, 2012 |
8 |
Simulation of the electrostatic and transport properties of 3D-stacked GAA silicon nanowire FETs Ruiz FG, Tienda-Luna IM, Godoy A, Sampedro C, Gamiz F, Donetti L Solid-State Electronics, 59(1), 62, 2011 |
9 |
Hole transport in DGSOI devices: Orientation and silicon thickness effects Donetti L, Gamiz F, Rodriguez N, Jimenez-Molinos F, Roldan JB Solid-State Electronics, 54(2), 191, 2010 |
10 |
Modeling the equivalent oxide thickness of Surrounding Gate SOI devices with high-kappa insulators Tienda-Luna IM, Ruiz FJG, Donetti L, Godoy A, Gamiz F Solid-State Electronics, 52(12), 1854, 2008 |