검색결과 : 1건
No. | Article |
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1 |
3D NAND flash memory with laterally-recessed channel (LRC) and connection gate architecture Yun JG, Lee JD, Park BG Solid-State Electronics, 55(1), 37, 2011 |
No. | Article |
---|---|
1 |
3D NAND flash memory with laterally-recessed channel (LRC) and connection gate architecture Yun JG, Lee JD, Park BG Solid-State Electronics, 55(1), 37, 2011 |