검색결과 : 4건
| No. | Article |
|---|---|
| 1 |
Resistive memory variability: A simplified trap-assisted tunneling model Garbin D, Vianello E, Rafhay Q, Azzaz M, Candelier P, DeSalvo B, Ghibaudo G, Perniola L Solid-State Electronics, 115, 126, 2016 |
| 2 |
Improvement of performances HfO2-based RRAM from elementary cell to 16 kb demonstrator by introduction of thin layer of Al2O3 Azzaz M, Benoist A, Vianello E, Garbin D, Jalaguier E, Cagli C, Charpin C, Bernasconi S, Jeannot S, Dewolf T, Audoit G, Guedj C, Denorme S, Candelier P, Fenouillet-Beranger C, Perniola L Solid-State Electronics, 125, 182, 2016 |
| 3 |
Study of resistive random access memory based on TiN/TaOx/TiN integrated into a 65 nm advanced complementary metal oxide semiconductor technology Diokh T, Le-Roux E, Jeannot S, Cagli C, Jousseaume V, Nodin JF, Gros-Jean M, Gaumer C, Mellier M, Cluzel J, Carabasse C, Candelier P, De Salvo B Thin Solid Films, 533, 24, 2013 |
| 4 |
Modelling of the 1T-Bulk capacitor-less DRAM cell with improved performances: The way to scaling Ranica R, Villaret A, Malinge P, Candelier P, Masson P, Bouchakour R, Mazoyer P, Skotnicki T Solid-State Electronics, 49(11), 1759, 2005 |