| 1 |
An equivalent doping profile for CMOS substrate characterization
Quaresma HJ, dos Santos PM, Serra AC
Solid-State Electronics, 79, 185, 2013 |
| 2 |
Single and compact ESD device Beta-Matrix solution based on bidirectional SCR Network in advanced 28/32 nm technology node
Bourgeat J, Galy P
Solid-State Electronics, 87, 34, 2013 |
| 3 |
Transfer of physically-based models from process to device simulations: Application to advanced SOI MOSFETs
Bazizi EM, Pakfar A, Fazzini PF, Cristiano F, Tavernier C, Claverie A, Zographos N, Zechner C, Scheid E
Thin Solid Films, 518(9), 2427, 2010 |
| 4 |
Hf1-xSixOy dielectric films deposited by UV-photo-induced chemical vapour deposition (UV-CVD)
Liu M, Zhu LQ, He G, Wang ZM, Wu JX, Zhang JY, Liaw I, Fang Q, Boyd IW
Applied Surface Science, 253(19), 7869, 2007 |
| 5 |
Measurement of generation parameters on Ru/HfO2/Si MOS capacitor
Tapajna M, Harmatha L, Husekova K
Solid-State Electronics, 50(2), 177, 2006 |
| 6 |
Optimum bias of power transistor in 0.18 mu m CMOS technology for Bluetooth application
Hsu HM, Lee TH
Solid-State Electronics, 50(3), 412, 2006 |
| 7 |
Characterization of sub-100 nm CMOS process using screening experiment technique
Srinivasaiah HC, Bhat N
Solid-State Electronics, 49(3), 431, 2005 |
| 8 |
The effects of scaling on the performance of small-signal MOS amplifiers
Fiegna C
Solid-State Electronics, 46(5), 675, 2002 |
| 9 |
A DC current stress method to improve the voltage coefficient of resistance of the polysilicon resistor in high voltage CMOS technology
Chen CH, Fang YK, Kuo MH, Hsu YL, Hsu SL
Solid-State Electronics, 44(10), 1743, 2000 |
| 10 |
Selectivity Mechanisms in Low-Pressure Selective Epitaxial Silicon Growth
Fitch JT
Journal of the Electrochemical Society, 141(4), 1046, 1994 |
