| 1 |
Effects of extended poly gate on the performance of strained P-type metal-oxide-semiconductor field-effect transistors with a narrow channel width
Lee CC, Liu CH, Hsu HW, Hung MH
Thin Solid Films, 557, 311, 2014 |
| 2 |
Mechanical property effects of Si-1 (-) Ge-x(x) channel and stressed contact etching stop layer on nano-scaled n-type metal-oxide-semiconductor field effect transistors
Lee CC, Cheng HC, Hsu HW, Chen ZH, Teng HH, Liu CH
Thin Solid Films, 557, 316, 2014 |
| 3 |
Investigation of consequent process-induced stress for N-type metal oxide semiconductor field effect transistor with a sunken shallow trench isolation pattern
Lee CC, Liu CH, Deng RH, Hsu HW, Chiang KN
Thin Solid Films, 557, 323, 2014 |
| 4 |
Simulation-based sensitivity estimation of the geometric effect of poly gates on nanoscale n-type metal-oxide-semiconductor field-effect transistors with silicon-carbon alloy
Lee CC, Liu CH, Teng HH
Thin Solid Films, 570, 336, 2014 |
| 5 |
Nanoscale CMOSFET performance improvement and reliability study for local strain techniques
Huang HL, Chen JK, Houng MP
Solid-State Electronics, 79, 31, 2013 |
| 6 |
Phenomena of n-type metal-oxide-semiconductor-field-effect-transistors with contact etch stop layer stressor for different channel lengths
Hsu HW, Lin KC, Lee CC, Twu MJ, Huang HS, Chen SY, Peng MR, Teng HH, Liu CH
Thin Solid Films, 544, 120, 2013 |
| 7 |
Strain engineering of nanoscale Si MOS devices
Huang J, Chang ST, Hsieh BF, Liao MH, Wang WC, Lee CC
Thin Solid Films, 518, S241, 2010 |
| 8 |
High gate voltage drain current leveling off and its low-frequency noise in 65 nm fully-depleted strained and non-strained SOI nMOSFETs
LukyanchikovA N, Garbar N, Kudina V, Smolanka A, Lokshin M, Simoen E, Claeys C
Solid-State Electronics, 52(5), 801, 2008 |
| 9 |
Impact strain engineering on gate stack quality and reliability
Claeys C, Simoen E, Put S, Giusi G, Crupi F
Solid-State Electronics, 52(8), 1115, 2008 |
| 10 |
Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layer
Tsai TI, Lin HC, Lee YJ, Chen KS, Wang J, Hsueh FK, Chao TS, Huang TY
Solid-State Electronics, 52(10), 1518, 2008 |
