검색결과 : 11건
| No. | Article |
|---|---|
| 1 |
Mobility extraction for short channel UTBB-FDSOI MOSFETs under back bias using an accurate inversion charge density model Trojman L, Ragnarsson LA, Collaert N Solid-State Electronics, 154, 24, 2019 |
| 2 |
Electrical characterization of Random Telegraph Noise in Fully-Depleted Silicon-On-Insulator MOSFETs under extended temperature range and back-bias operation Marquez C, Rodriguez N, Gamiz F, Ruiz R, Ohata A Solid-State Electronics, 117, 60, 2016 |
| 3 |
Impact of fin length on threshold voltage modulation by back bias for Independent double-gate tunnel fin field-effect transistors Mizubayashi W, Fukuda K, Mori T, Endo K, Liu YX, Matsukawa T, O'uchi S, Ishikawa Y, Migita S, Morita Y, Tanabe A, Tsukada J, Yamauchi H, Masahara M, Ota H Solid-State Electronics, 111, 62, 2015 |
| 4 |
Dual Ground Plane EDMOS in 28 nm FDSOI for 5 V power management applications Litty A, Ortolland S, Golanski D, Cristoloveanu S Solid-State Electronics, 113, 42, 2015 |
| 5 |
Reliability of ultra-thin buried oxides for multi-V-T FDSOI technology Besnard G, Garros X, Nguyen P, Andrieu F, Reynaud P, Van Den Daele W, Bourdelle KK, Schwarzenbach W, Toffoli A, Kies R, Delprat D, Reimbold G, Cristoloveanu S Solid-State Electronics, 97, 8, 2014 |
| 6 |
Enhanced coupling effects in vertical double-gate FinFETs Chang SJ, Bawedin M, Guo YF, Liu FY, Akarvardar K, Lee JH, Lee JH, Ionica I, Cristoloveanu S Solid-State Electronics, 97, 88, 2014 |
| 7 |
Back biasing effects in tri-gate junctionless transistors Park SJ, Jeon DY, Montes L, Barraud S, Kim GT, Ghibaudo G Solid-State Electronics, 87, 74, 2013 |
| 8 |
Impact of local back biasing on performance in hybrid FDSOI/bulk high-k/metal gate low power (LP) technology Fenouillet-Beranger C, Perreau P, Benoist T, Richier C, Haendler S, Pradelle J, Bustos J, Brun P, Tosti L, Weber O, Andrieu F, Orlando B, Pellissier-Tanon D, Abbate F, Richard C, Beneyton R, Gregoire M, Ducote J, Gouraud P, Margain A, Borowiak C, Bianchini R, Planes N, Gourvest E, Bourdelle KK, Nguyen BY, Poiroux T, Skotnicki T, Faynot O, Boeuf F Solid-State Electronics, 88, 15, 2013 |
| 9 |
Parasitic bipolar impact in 32 nm undoped channel Ultra-Thin BOX (UTBOX) and biased Ground Plane FDSOI high-k/metal gate technology Fenouillet-Beranger C, Perreau P, Boulenc P, Tosti L, Barnola S, Andrieu F, Weber O, Beneyton R, Perrot C, de Buttet C, Abbate F, Campidelli Y, Pinzelli L, Gouraud P, Margain A, Peru S, Bourdelle KK, Nguyen BY, Boedt F, Poiroux T, Faynot O, Skotnicki T, Boeuf F Solid-State Electronics, 74, 32, 2012 |
| 10 |
A high efficient, low power, and compact charge pump by vertical MOSFETs Sakui K, Endoh T Solid-State Electronics, 54(10), 1192, 2010 |