검색결과 : 4건
| No. | Article |
|---|---|
| 1 |
Narrowing of band gap at source/drain contact scheme of nanoscale InAs-nMOS Mohamed AH, Oxland R, Aldegunde M, Hepplestone SP, Sushko PV, Kalna K Solid-State Electronics, 142, 31, 2018 |
| 2 |
Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations Elmessary MA, Nagy D, Aldegunde M, Seoane N, Indalecio G, Lindberg J, Dettmer W, Peric D, Garcia-Loureiro AJ, Kalna K Solid-State Electronics, 128, 17, 2017 |
| 3 |
3D'atomistic' simulations of dopant induced variability in nanoscale implant free In0.75Ga0.25As MOSFETs Seoane N, Aldegunde M, Garcia-Loureiro A, Valin R, Kalna K Solid-State Electronics, 69, 43, 2012 |
| 4 |
NEGF simulations of a junctionless Si gate-all-around nanowire transistor with discrete dopants Martinez A, Aldegunde M, Brown AR, Roy S, Asenov A Solid-State Electronics, 71, 101, 2012 |