검색결과 : 5건
No. | Article |
---|---|
1 |
Enhanced coupling effects in vertical double-gate FinFETs Chang SJ, Bawedin M, Guo YF, Liu FY, Akarvardar K, Lee JH, Lee JH, Ionica I, Cristoloveanu S Solid-State Electronics, 97, 88, 2014 |
2 |
Characterization of heavily doped SOI wafers under pseudo-MOSFET configuration Liu FY, Diab A, Ionica I, Akarvardar K, Hobbs C, Ouisse T, Mescot X, Cristoloveanu S Solid-State Electronics, 90, 65, 2013 |
3 |
(110) and (100) Sidewall-oriented FinFETs: A performance and reliability investigation Young CD, Akarvardar K, Baykan MO, Matthews K, Ok I, Ngai T, Ang KW, Pater J, Smith CE, Hussain MM, Majhi P, Hobbs C Solid-State Electronics, 78, 2, 2012 |
4 |
Finite element analysis and analytical simulations of Suspended Gate-FET for ultra-low power inverters Tsamados D, Chauhan YS, Eggimann C, Akarvardar K, Wong HSP, Ionescu AM Solid-State Electronics, 52(9), 1374, 2008 |
5 |
Thin film fully-depleted SOI four-gate transistors Akarvardar K, Cristoloveanu S, Bawedin M, Gentil P, Blalock BJ, Flandre D Solid-State Electronics, 51(2), 278, 2007 |