검색결과 : 1건
| No. | Article |
|---|---|
| 1 |
A new CMP-less integration approach for highly scaled totally silicided (TOSI) gate bulk transistors based on the use of selective S/D Si epitaxy and ultra-low gates Muller M, Mondot A, Aime D, Froment B, Talbot A, Roux JM, Ribes G, Morand Y, Descombes S, Gouraud P, Leverd F, Pokrant S, Toffoli A, Skotnicki T Solid-State Electronics, 50(4), 620, 2006 |